AD6122 Datasheet | Analog Devices

FEATURES Fully pliant with IS98A and PCS Specifications Linear IF Amplifier - 63 d B to +34 d B Linear-in-d B Gain Control Temperature-pensated Gain Control Quadrature Modulator Modulates IFs from 50 MHz to 350 MHz Integral Low Dropout Regulator Accepts 2.9 V to 4.2 V Input from Battery Low Power 10.4 m A at Midgain <10 ␮ A Sleep Mode Operation panion Receiver IF Chip Available (AD6121) APPLICATIONS CDMA, W-CDMA, AMPS and TACS Operation QPSK Transmitters GENERAL DESCRIPTION CDMA 3 V Transmitter IF Subsystem with Integrated Voltage Regulator AD6122 range IF amplifiers with voltage-controlled gain and a powerdown control input. An integral low dropout regulator allows operation from battery voltages from 2.9 V to 4.2 V. The gain control input accepts an external gain control voltage input from a DAC. It provides 97 d B of gain control with a nominal 75 d B/V scale factor. Either an internal or an external reference may be used to set the gain-control scale factor. The I and Q modulator accepts differential quadrature baseband inputs from a CDMA baseband converter. The local oscillator is injected at twice the IF frequency. A divide-by-two quadrature generator followed by dual polyphase filters ensures ± 1° quadrature accuracy. The modulator provides a mon-mode reference output to bias the transmit DACs in the baseband converter to the same mon-mode voltage as the modulator inputs, allowing dc coupling between the two ICs and thus eliminating the need to charge and discharge coupling capacitors. This allows the fastest power-up and power-down times for the AD6122 and CDMA baseband ICs. The AD6122 is fabricated using a 25 GHz f t silicon Bi CMOS process and is packaged in a 28-lead SSOP and a 32-leadless LPCC chip scale package (5 mm × 5 mm). The AD6122 is a low power IF transmitter subsystem, specifically designed for CDMA applications. It consists of an I and Q modulator, a divide-by-two quadrature generator, high dynamic FUNCTIONAL BLOCK DIAGRAM QUADRATURE MODULATOR...