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AD6684 - 135MHz Quad IF Receiver

Description

4  Product Highlights 4  Specifications 5  DC Specifications 5  AC Specifications 6  Digital Specifications 8  Switching Specifications 9  Timing Specifications 9  Absolute Maximum Ratings 11  Thermal Characteristics 11  ESD Caution 11  Pin Configuration and Function Descriptions 12  Typical

Features

  • JESD204B (Subclass 1) coded serial digital outputs Lane rates up to 15 Gbps 1.68 W total power at 500 MSPS 420 mW per analog-to-digital converter (ADC) channel SFDR = 82 dBFS at 305 MHz (1.8 V p-p input range) SNR = 66.8 dBFS at 305 MHz (1.8 V p-p input range) Noise density =.
  • 151.5 dBFS/Hz (1.8 V p-p input range) Analog input buffer On-chip dithering to improve small signal linearity Flexible differential input range 1.44 V p-p to 2.16 V p-p (1.80 V p-p nominal) 82 dB channel isolation/.

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Full PDF Text Transcription

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Data Sheet 135 MHz Quad IF Receiver AD6684 FEATURES JESD204B (Subclass 1) coded serial digital outputs Lane rates up to 15 Gbps 1.68 W total power at 500 MSPS 420 mW per analog-to-digital converter (ADC) channel SFDR = 82 dBFS at 305 MHz (1.8 V p-p input range) SNR = 66.8 dBFS at 305 MHz (1.8 V p-p input range) Noise density = −151.5 dBFS/Hz (1.8 V p-p input range) Analog input buffer On-chip dithering to improve small signal linearity Flexible differential input range 1.44 V p-p to 2.16 V p-p (1.80 V p-p nominal) 82 dB channel isolation/crosstalk 0.975 V, 1.8 V, and 2.
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