FEATURES
Dual 12-bit SAR ADC Simultaneous Sampling Throughput rate: 5 MSPS Per Channel Specified for VDD of 2.5 V No latency to 12 bits Power dissipation: 35 mW at 5 MSPS On-chip reference: 2.048 V ± 0.5% max @ 25°C, 10ppm/°C Dual conversion with read High speed serial interface: SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible −40°C to +125°C operation Shutdown mode: 10 µA max 16-lead TSSOP package Differential Input, Dual, 5 MSPS, 12-Bit, SAR ADC AD7356 FUNCTIONAL BLOCK DIAGRAM Vdd Vdrive AD7356 VINA+ VINAT/H 12-BIT SUCCESSIVE APPROXIMATION ADC SDATAA BUF REF BUF CONTROL LOGIC SCLK CS VINB+ VINBT/H 12-BIT SUCCESSIVE APPROXIMATION ADC SDATAB AGND AGND REFGND DGND Figure 1. GENERAL DESCRIPTION
The AD73561 is a dual, 12-bit, high speed, low power, successive approximation ADC that operates from a single 2.5 V power supply and features throughput rates up to 5 MSPS. The part contains two ADCs, each preceded by a low noise, wide bandwidth track-andhold circuit that can handle input frequencies in excess of 200 MHz.