FEATURES
Fast throughput rate: 1 MSPS Specified for VDD of 2.7 V to 5.25 V Low power at maximum throughput rate: 4 mW maximum at 1 MSPS with VDD = 3 V 9.25 mW maximum at 1 MSPS with VDD = 5 V Pseudo differential analog input Wide input bandwidth: 70 dB SINAD at 100 kHz input frequency Flexible power/serial clock speed management No pipeline delays High speed serial interface: SPI®-/QSPI™-/MICROWIRE™-/DSP-compatible Power-down mode: 1 μA maximum 8-lead SOT-23 and MSOP packages FUNCTIONAL BLOCK DIAGRAM VDD VIN+ VIN– VREF T/H 12-BIT SUCCESSIVE APPROXIMATION ADC SCLK AD7441/AD7451 CONTROL LOGIC SDATA CS APPLICATIONS
Transducer interface Battery-powered systems Data acquisition systems Portable instrumentation GND Figure 1. GENERAL DESCRIPTION
The AD7441/AD7451 1 are, respectively, 10-/12-bit high speed, low power, single-supply, successive approximation (SAR), analog-to-digital converters (ADCs) that feature a pseudo differential analog input. These parts operate from a single 2.7 V to 5.25 V power supply and achieve very low power dissipation at high throughput rates of up to 1 MSPS.
Analog Devices
