AD7441 Datasheet | Analog Devices

FEATURES Fast throughput rate: 1 MSPS Specified for VDD of 2.7 V to 5.25 V Low power at maximum throughput rate: 4 m W maximum at 1 MSPS with VDD = 3 V 9.25 m W maximum at 1 MSPS with VDD = 5 V Pseudo differential analog input Wide input bandwidth: 70 d B SINAD at 100 k Hz input frequency Flexible power/serial clock speed management No pipeline delays High speed serial interface: SPI®-/QSPI™-/MICROWIRE™-/DSP-patible Power-down mode: 1 μA maximum 8-lead SOT-23 and MSOP packages FUNCTIONAL BLOCK DIAGRAM VIN+ VIN- VREF T/H 12-BIT SUCCESSIVE APPROXIMATION ADC SCLK AD7441/AD7451 CONTROL LOGIC SDATA CS APPLICATIONS Transducer interface Battery-powered systems Data acquisition systems Portable instrumentation Figure 1. GENERAL DESCRIPTION The AD7441/AD7451 1 are, respectively, 10-/12-bit high speed, low power, single-supply, successive approximation (SAR), analog-to-digital converters (ADCs) that feature a pseudo differential analog input. These parts operate from a single 2.7 V to 5.25 V power supply and achieve very low power dissipation at high throughput rates of up to 1 MSPS. The AD7441/AD7451 contain a low noise, wide bandwidth, differential track-and-hold (T/H) amplifier that handles input frequencies up to 3.5 MHz. The reference voltage for these devices is applied externally to the VREF pin and can range from 100 m V to VDD, depending on the power supply and what suits the application. The conversion process and data acquisition are controlled using CS and the serial clock, allowing the device to interface with microprocessors or DSPs. The input signals are sampled on the falling edge of CS when the conversion is initiated. The SAR architecture of these parts ensures that there are no pipeline delays. PRODUCT HIGHLIGHTS 1. 2. Operation with 2.7 V to 5.25 V Power Supplies. High Throughput with Low Power Consumption. With a 3 V supply, the AD7441/AD7451 offer 4 m W maximum power consumption for a 1 MSPS throughput rate. Pseudo Differential Analog...