Data Retiming Phase-locked Loop
| Part number | AD805 |
|---|---|
| Manufacturer | Analog Devices |
| File Size | 307.39 KB |
| Description | Data Retiming Phase-Locked Loop |
| Datasheet | AD805-AnalogDevices.pdf |
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The AD805 is a data retiming phase-locked loop designed for Ouse with a Voltage-Controlled Crystal Oscillator (VCXO) to perform clock recovery and data retiming on Nonreturn to Zero B(NRZ) data. The circuit provides clock recovery and data Sretiming on standard telemunications STS-3 or STM-1 data (155.52 Mbps). A Vectron C0-434Y Series VCXO circuit Ois used with the AD805 for specification purposes.
See all Analog Devices datasheets
| Part Number | Description |
|---|---|
| AD8051 | Rail-to-Rail Amplifiers |
| AD8052 | Rail-to-Rail Amplifiers |
| AD8054 | Rail-to-Rail Amplifiers |
| AD8055 | Voltage Feedback Amplifiers |
| AD8056 | Voltage Feedback Amplifiers |
| AD8057 | 325 MHz Amplifier |
| AD8058 | 325 MHz Amplifier |
| AD800 | Clock Recovery and Data Retiming Phase-Locked Loop |
| AD8000 | Ultrahigh Speed Op Amp |
| AD8001 | Current Feedback Amplifier |
