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AD805 - Data Retiming Phase-Locked Loop

General Description

Ouse with a Voltage-Controlled Crystal Oscillator (VCXO) to perform clock recovery and data retiming on Nonreturn to Zero B(NRZ) data.

Key Features

  • ES CLOCK.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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a Data Retiming Phase-Locked Loop AD805* FEATURES CLOCK RECOVERY AND 155 Mbps Clock Recovery and Data Retiming DATA RETIMING APPLICATION Permits CCITT G.958 Type A Jitter Tolerance Permits CCITT G.958 Type B Jitter Transfer Random Jitter: 0.6؇ rms Pattern Jitter: Virtually Eliminated Jitter Peaking: Fundamentally None DATA INPUT VOLTAGE CONTROLLED PHASE SHIFTER PHASE DETECTOR LOOP FILTER GAIN Acquisition: 30 Bit Periods Accepts NRZ Data without Preamble Single Supply Operation: –5.2 V or +5 V 10 KH ECL Compatible PRODUCT DESCRIPTION The AD805 is a data retiming phase-locked loop designed for Ouse with a Voltage-Controlled Crystal Oscillator (VCXO) to perform clock recovery and data retiming on Nonreturn to Zero B(NRZ) data.