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Data Sheet AD9122
Dual, 16–Bit, 1230 MSPS, TxDAC+ Digital-to-Analog Converter
FEATURES ► Flexible LVDS interface allows word, byte, or nibble load ► Single-carrier W-CDMA ACLR = 82 dBc at 122.88 MHz IF ► Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω ► Integrated 2×/4×/8× interpolator/complex modulator allows carri-
er placement anywhere in the DAC bandwidth ► Gain, dc offset, and phase adjustment for sideband suppression ► Multiple chip synchronization interfaces ► High performance, low noise PLL clock multiplier ► Digital inverse sinc filter ► Low power: 1.5 W at 1.