AD9146 Datasheet | Analog Devices

Data Sheet Dual, 16-Bit, 1230 MSPS, TxDAC+ Digital-to-Analog Converter Features Flexible LVDS interface allows byte or nibble load Single-carrier W-CDMA ACLR = 80 dBc at 122.88 MHz IF Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 Ω to 50 Ω Integrated 2×/4× interpolator/plex modulator allows carrier placement anywhere in the DAC bandwidth Gain, dc offset, and phase adjustment for sideband suppression Multiple chip synchronization interfaces High performance, low noise PLL clock multiplier Digital inverse sinc filter Low power: 1.2 W at 1.0 GSPS, 800 mW at 500 MSPS, full operating conditions 48-lead, exposed paddle LFCSP APPLICATIONS Wireless infrastructure W-CDMA,...