Datasheet Details
| Part number | AD9512 |
|---|---|
| Manufacturer | Analog Devices |
| File Size | 509.15 KB |
| Description | 1.2 GHz Clock Distribution |
| Datasheet |
 AD9512 Datasheet
|
|
|
General Description
The AD9512 provides a multi-output clock distribution in a design that emphasizes low jitter and low phase noise to maximize data converter performance.
Other applications with demanding phase noise and jitter requirements can also benefit from this part.
There are five independent clock outputs.
Key Features
- Two 1.6 GHz, differential clock inputs 5 programmable dividers, 1 to 32, all integers Phase select for output-to-output coarse delay adjust 3 independent 1.2 GHz LVPECL outputs Additive output jitter 225 fs rms 2 independent 800 MHz/250 MHz LVDS/CMOS clock outputs Additive output jitter 275 fs rms Fine delay adjust on 1 LVDS/CMOS output Serial control port Space-saving 48-lead LFCSP.