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AD9522-4 - 12 LVDS/24 CMOS Output Clock Generator

Key Features

  • Low phase noise, phase-locked loop (PLL) On-chip voltage controlled oscillator (VCO) tunes from 1.4 GHz to 1.8 GHz Supports external 3.3 V/5 V VCO/VCXO to 2.4 GHz 1 differential or 2 single-ended reference inputs Accepts CMOS, LVPECL, or LVDS references to 250 MHz Accepts 16.62 MHz to 33.3 MHz crystal for reference input Optional reference clock doubler Reference monitoring capability Revertive automatic and manual reference switchover/ holdover modes Glitch-free switchover between references Au.

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Full PDF Text Transcription for AD9522-4 (Reference)

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Data Sheet 12 LVDS/24 CMOS Output Clock Generator with Integrated 1.6 GHz VCO AD9522-4 07225-001 FEATURES Low phase noise, phase-locked loop (PLL) On-chip voltage control...

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TURES Low phase noise, phase-locked loop (PLL) On-chip voltage controlled oscillator (VCO) tunes from 1.4 GHz to 1.8 GHz Supports external 3.3 V/5 V VCO/VCXO to 2.4 GHz 1 differential or 2 single-ended reference inputs Accepts CMOS, LVPECL, or LVDS references to 250 MHz Accepts 16.62 MHz to 33.