AD9862 - Mixed-Signal Front-End (MxFE) Processor for Broadband Communications

⌺-⌬ LOGIC LOW AD9860/AD9862 SPI REGISTERS SPI INTERFACE AUX_DAC_A AUX_DAC_B AUX_DAC_C AUX DAC AUX DAC AUX DAC Rx PATH TIMING Tx PATH TIMING AUX ADC CLOCK DISTRIBUTION BLOCK DLL 1؋, 2؋, 4؋ OSC1 OSC2 AUX_ADC_A1 AUX_ADC_A2 AUX_ADC_B1 AUX ADC AUX_ADC_B2 CLKOUT1 BYPASSABLE DIGITAL QUADRATURE MI

• Mixed-Signal Front-End Processor with Dual Converter Receive and Dual Converter Transmit Signal Paths Receive Signal Path Includes: Two 10-/12-Bit, 64 MSPS Sampling A/D Converters with Internal or External Independent References, Input Buffers, Programmable Gain Amplifiers, Low-Pass Decimation Filters, and a Digital Hilbert Filter Transmit Signal Path Includes: Two 12-/14-Bit, 128 MSPS D/A Converters with Programmable Full-Scale Output Current, Channel Independent Fine Gain and Offset Control, D.