AD9874 Datasheet | Analog Devices

IF Digitizing Subsystem AD9874- Features 10 MHz to 300 MHz Input Frequency 7.2 k Hz to 270 k Hz Output Signal Bandwidth 8.1 d B SSB NF 0 d Bm IIP3 AGC Free Range up to - 34 d Bm 12 d B Continuous AGC Range 16 d B Front End Attenuator Baseband I/Q 16-Bit (or 24-Bit) Serial Digital Output LO and Sampling Clock Synthesizers Programmable Decimation Factor, Output Format, AGC, and Synthesizer Settings 370 ⍀ Input Impedance 2.7 V to 3.6 V Supply Voltage Low Current Consumption: 20 m A 48-Lead LQFP Package (1.4 mm Thick) APPLICATIONS Multimode Narrow-Band Radio Products Analog/Digital UHF/VHF FDMA Receivers TETRA, APCO25, GSM/EDGE Portable and Mobile Radio Products Base Station Applications SAT Terminals GENERAL DESCRIPTION The AD9874 is a general-purpose IF subsystem that digitizes a low level 10 MHz to 300 MHz IF input with a signal bandwidth ranging from 6.8 k Hz to 270 k Hz. The signal chain of the AD9874 consists of a low noise amplifier, a mixer, a band-pass sigma-delta analog-to-digital converter, and a decimation filter with programmable decimation factor. An automatic gain control (AGC) circuit gives the AD9874 12 d B of continuous gain adjustment. Auxiliary blocks include both clock and LO synthesizers. The AD9874’s high dynamic range and inherent antialiasing provided by the band-pass sigma-delta converter allow the AD9874 to cope with blocking signals up to 95 d B stronger than the desired signal. This attribute can often reduce the cost of a radio by reducing its IF filtering requirements. Also, it enables multimode radios of varying channel bandwidths, allowing the IF filter to be specified for the largest channel bandwidth. The SPI port programs numerous parameters of the AD9874, thus allowing the device to be optimized for any given application. Programmable parameters include synthesizer divide ratios, AGC attenuation and attack/decay time, received signal strength level, decimation factor, output data format, 16 d B attenuator, and the selected bias currents. The...