AD9870 Datasheet | Analog Devices

a Features 10 MHz- 300 MHz Input Frequency Baseband (I/Q) Digital Output 10 k Hz- 150 k Hz Output Signal Bandwidth 12 d B SSB NF > - 1 d Bm IIP3 (High IIP3 Mode) 25 d B Continuous AGC Range + 16 d B Gain Step Support for LO and Sampling Clock Synthesis Programmable Decimation Rate, Output Format, AAF Cutoff, AGC and Synthesizer Settings 360 ⍀ Input Impedance 2.7 V- 3.6 V Supply Voltage Low Current: 42 m A Typ (High IIP3 Mode), 30 m A Typ (Low IIP3, Fixed Gain Mode) 48-Lead LQFP Package (1.4 mm Thick) APPLICATIONS Portable and Mobile Radio Products Digital UHF/VHF FDMA Products TETRA IF Digitizing Subsystem AD9870 PRODUCT DESCRIPTION The AD9870 is a general-purpose IF subsystem that digitizes a low-level 10 MHz- 300 MHz IF input with a bandwidth of up to 150 k Hz. The signal chain of the AD9870 consists of a low-noise amplifier, a mixer, a variable gain amplifier with integral antialias filter, a bandpass sigma-delta analog-to-digital converter, and a decimation filter with programmable decimation factor. An automatic gain control (AGC) circuit provides the AD9870 with 25 d B of continuous gain adjustment. The high dynamic range of the bandpass sigma-delta converter allows the AD9870 to cope with blocking signals that are as much as 70 d B stronger than the desired signal. Auxiliary blocks include clock and LO synthesizers as well as a serial peripheral interface (SPI) port. The SPI port programs numerous parameters of the AD9870, including the synthesizer divide ratios, the AGC attack and decay times, the AGC target signal level, the decimation factor, the output data format, the 16 d B attenuator, and the bias currents of several blocks. Reducing bias currents allows the user to reduce power consumption at the expense of reduced performance. FUNCTIONAL BLOCK DIAGRAM MXOP MXON GCP GCN IF2P IF2N - 16d B IFIN FREF LO SYNTH SAMP CLOCK SYNTHESIZER LNA VGA/ AAF DAC AGC ⌺-⌬ ADC f CLK = 18MHz DECIMATION FILTER FORMATTING/SSI DOUTA DOUTB FS CLKOUT CONTROL LOGIC VOLTAGE...