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AD9993 - Integrated Mixed-Signal Front End

General Description

The AD9993 is a mixed-signal front-end (MxFE®) device that integrates four 14-bit ADCs and two 14-bit DACs.

Figure 1 shows the block diagram of the MxFE.

The MxFE is programmable using registers accessed via a serial peripheral interface (SPI).

Key Features

  • Quad 14-bit 250 MSPS ADC SFDR = 83 dBc at 87 MHz input Dual 14-bit 500 MSPS DAC SFDR = 75 dBc at 20 MHz output On-chip PLL clock synthesizer Low power 1536 mW, 1 GHz master clock, on-chip synthesizer 500 MHz double data rate (DDR) LVDS interfaces for DACs and ADCs Small 12 mm × 12 mm lead-free BGA package.

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Data Sheet Integrated Mixed-Signal Front End (MxFE) AD9993 FEATURES Quad 14-bit 250 MSPS ADC SFDR = 83 dBc at 87 MHz input Dual 14-bit 500 MSPS DAC SFDR = 75 dBc at 20 MH...

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83 dBc at 87 MHz input Dual 14-bit 500 MSPS DAC SFDR = 75 dBc at 20 MHz output On-chip PLL clock synthesizer Low power 1536 mW, 1 GHz master clock, on-chip synthesizer 500 MHz double data rate (DDR) LVDS interfaces for DACs and ADCs Small 12 mm × 12 mm lead-free BGA package APPLICATIONS Point to point microwave backhaul radios Wireless repeaters GENERAL DESCRIPTION The AD9993 is a mixed-signal front-end (MxFE®) device that integrates four 14-bit ADCs and two 14-bit DACs. Figure 1 shows the block diagram of the MxFE. The MxFE is programmable using registers accessed via a serial peripheral interface (SPI).

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