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ADAU1977 - Quad ADC

General Description

The ADAU1977 incorporates four high performance analogto-digital converters (ADCs) with direct-coupled inputs capable of 10 V rms.

The ADC uses multibit sigma-delta (Σ-Δ) architecture with continuous time front end for low EMI.

Key Features

  • Programmable microphone bias (5 V to 9 V) with diagnostics Four 10 V rms capable direct-coupled differential inputs On-chip PLL for master clock Low EMI design 109 dB ADC dynamic range.
  • 95 dB THD + N Selectable digital high-pass filter 24-bit ADC with 8 kHz to 192 kHz sample rates Digital volume control with autoramp function I2C/SPI control Software-controllable clickless mute Software power-down Right justified, left justified, I2S justified, and TDM modes Master and slave operation mo.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Data Sheet FEATURES Programmable microphone bias (5 V to 9 V) with diagnostics Four 10 V rms capable direct-coupled differential inputs On-chip PLL for master clock Low EMI design 109 dB ADC dynamic range −95 dB THD + N Selectable digital high-pass filter 24-bit ADC with 8 kHz to 192 kHz sample rates Digital volume control with autoramp function I2C/SPI control Software-controllable clickless mute Software power-down Right justified, left justified, I2S justified, and TDM modes Master and slave operation modes 40-lead LFCSP package Qualified for automotive applications APPLICATIONS Automotive audio systems Active noise cancellation system Quad ADC with Diagnostics ADAU1977 GENERAL DESCRIPTION The ADAU1977 incorporates four high performance analogto-digital converters (ADCs) with direct-co