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ADN2806 - Clock and Data Recovery IC

General Description

The ADN2806 provides the receiver functions for clock and data recovery, and data retiming for 622 Mbps NRZ data.

The ADN2806 automatically locks to 622 Mbps data without the need for an external reference clock or programming.

In the absence of input data, the output clock drifts no more than ±5%.

Key Features

  • Exceeds SONET requirements for jitter transfer/ generation/tolerance Patented clock recovery architecture No reference clock required Loss-of-lock indicator I2C® interface to access optional features Single-supply operation: 3.3 V Low power: 359 mW typical 5 mm × 5 mm, 32-lead LFCSP, Pb free.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com 622 Mbps Clock and Data Recovery IC ADN2806 FEATURES Exceeds SONET requirements for jitter transfer/ generation/tolerance Patented clock recovery architecture No reference clock required Loss-of-lock indicator I2C® interface to access optional features Single-supply operation: 3.3 V Low power: 359 mW typical 5 mm × 5 mm, 32-lead LFCSP, Pb free GENERAL DESCRIPTION The ADN2806 provides the receiver functions for clock and data recovery, and data retiming for 622 Mbps NRZ data. The ADN2806 automatically locks to 622 Mbps data without the need for an external reference clock or programming. In the absence of input data, the output clock drifts no more than ±5%. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance.