ADP1763 Datasheet | Analog Devices

FEATURES 3 A maximum output current Low input voltage supply range VIN = 1.10 V to 1.98 V, no external bias supply required Fixed output voltage range: VOUT_FIXED = 0.9 V to 1.5 V Adjustable output voltage range: VOUT_ADJ = 0.5 V to 1.5 V Ultralow noise: 2 μV rms, 100 Hz to 100 k Hz Noise spectral density 4 n V/√Hz at 10 k Hz 3 n V/√Hz at 100 k Hz Low dropout voltage: 95 m V typical at 3 A load Operating supply current: 4.5 m A typical at no load ±1.5% fixed output voltage accuracy over line, load, and temperature Excellent power supply rejection ratio (PSRR) performance 59 d B typical at 10 k Hz at 3 A load 43 d B typical at 100 k Hz at 3 A load Excellent load/line transient response Soft start to reduce inrush current Optimized for small 10 μF ceramic capacitors Current-limit and thermal overload protection Power-good indicator Precision enable 16-lead, 3 mm × 3 mm LFCSP package APPLICATIONS Regulation to noise sensitive applications such as radio frequency (RF) transceivers, analog-to-digital converter (ADC) and digital-to-analog converter (DAC) circuits, phase-locked loops (PLLs), voltage controlled oscillators (VCOs) and clocking integrated circuits Field-programmable gate array (FPGA) and digital signal processor (DSP) supplies Medical and healthcare Industrial and instrumentation GENERAL DESCRIPTION The ADP1763 is a low noise, low dropout (LDO) linear regulator. It is designed to operate from a single input supply with an input voltage as low as 1.10 V without the requirement of an external bias supply to increase efficiency and provide up to 3 A of output current. The low 95 m V typical dropout voltage at a 3 A load allows the ADP1763 to operate with a small headroom while maintaining regulation and providing better efficiency. The ADP1763 is optimized for stable operation with small 10 μF ceramic output capacitors. The ADP1763 delivers optimal transient performance with minimal board area. Rev. D Document Feedback Information furnished by Analog Devices is believed...