Datasheet4U Logo Datasheet4U.com

ADP322 - High PSRR Voltage Regulator

Datasheet Summary

Description

The ADP322/ADP323 200 mA triple output LDOs combine high PSRR, low noise, low quiescent current, and low dropout voltage to extend the battery life of portable devices and are ideally suited for wireless applications with demanding performance and board space requirements.

Features

  • Fixed (ADP322) and adjustable output (ADP323) options Bias voltage range (VBIAS): 2.5 V to 5.5 V LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V Three 200 mA low dropout voltage regulators (LDOs) 16-lead, 3 mm × 3 mm LFCSP Initial accuracy: ±1% Stable with 1 µF ceramic output capacitors No noise bypass capacitor required 3 independent logic controlled enables Overcurrent and thermal protection Key specifications High PSRR 76 dB PSRR up to 1 kHz 70 dB PSRR at 10 kHz 60 dB PSRR at 100 kH.

📥 Download Datasheet

Datasheet preview – ADP322

Datasheet Details

Part number ADP322
Manufacturer Analog Devices
File Size 834.39 KB
Description High PSRR Voltage Regulator
Datasheet download datasheet ADP322 Datasheet
Additional preview pages of the ADP322 datasheet.
Other Datasheets by Analog Devices

Full PDF Text Transcription

Click to expand full text
Data Sheet FEATURES Fixed (ADP322) and adjustable output (ADP323) options Bias voltage range (VBIAS): 2.5 V to 5.5 V LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V Three 200 mA low dropout voltage regulators (LDOs) 16-lead, 3 mm × 3 mm LFCSP Initial accuracy: ±1% Stable with 1 µF ceramic output capacitors No noise bypass capacitor required 3 independent logic controlled enables Overcurrent and thermal protection Key specifications High PSRR 76 dB PSRR up to 1 kHz 70 dB PSRR at 10 kHz 60 dB PSRR at 100 kHz 40 dB PSRR at 1 MHz Low output noise 24 µV rms typical output noise at VOUT = 1.2 V 43 µV rms typical output noise at VOUT = 2.
Published: |