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ADSP-21020 - 32/40-Bit IEEE Floating-Point DSP Microprocessor

General Description

32/40-Bit IEEE Floating-Point DSP Microprocessor ADSP-21020 FUNCTIONAL BLOCK DIAGRAM DATA ADDRESS GENERATORS DAG 1 DAG 2 INSTRUCTION CACHE PROGRAM SEQUENCER JTAG TEST & EMULATION PROGRAM MEMORY ADDRESS DATA MEMORY ADDRESS EXTERNAL ADDRESS BUSES PROGRAM MEMORY DATA DATA MEMORY DATA EXTERNAL DA

Key Features

  • Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle Execution 100 MFLOPS Peak, 66 MFLOPS Sustained Performance 1024-Point Complex FFT Benchmark: 0.58 ms Divide (y/x): 180 ns Inverse Square Root (1/√x ): 270 ns 32-Bit Single-Precision and 40-Bit Extended-Precision IEEE Floating-Point Data Formats 32-Bit Fixed-Point Formats, Integer and Fractional, with 80-Bit Accumulators IEEE Exception Han.

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www.DataSheet4U.com a FEATURES Superscalar IEEE Floating-Point Processor Off-Chip Harvard Architecture Maximizes Signal Processing Performance 30 ns, 33.3 MIPS Instruction Rate, Single-Cycle Execution 100 MFLOPS Peak, 66 MFLOPS Sustained Performance 1024-Point Complex FFT Benchmark: 0.