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ADSP-21363 - SHARC Processor

This page provides the datasheet information for the ADSP-21363, a member of the ADSP-21362 SHARC Processor family.

Description

3 SHARC Family Core Architecture 4 Family Peripheral Architecture 6 I/O Processor

Features

  • include: JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios Available in 136-ball CSP_BGA and 144-lead LQFP_EP packages SIMD Core Instruction Cache 5 stage Sequencer DAG1/2 Timer PEx PEy FLAGx/IRQx/ TMREXP JTAG Block 0 RAM/ROM Internal Memory Block 1 RAM/ROM Block 2 RAM Block 3 RAM DMD 64-BIT PMD 64-BIT S C.

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Datasheet preview – ADSP-21363

Datasheet Details

Part number ADSP-21363
Manufacturer Analog Devices
File Size 1.30 MB
Description SHARC Processor
Datasheet download datasheet ADSP-21363 Datasheet
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Full PDF Text Transcription

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SHARC Processors ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366 SUMMARY High performance 32-bit/40-bit floating point processor optimized for high performance audio processing Single-instruction, multiple-data (SIMD) computational architecture On-chip memory—3M bits of on-chip SRAM Code compatible with all other members of the SHARC family The ADSP-2136x processors are available with up to 333 MHz core instruction rate with unique audiocentric peripherals such as the digital applications interface, S/PDIF transceiver, DTCP (digital transmission content protection protocol), serial ports, precision clock generators, and more. For complete ordering information, see Ordering Guide on Page 56.
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