ADSP-21368 Datasheet | Analog Devices

features include JTAG access to memory permitted with a 64-bit key Protected memory regions that can be assigned to limit access under program control to sensitive code PLL has a wide variety of software and hardware multi- plier/divider ratios Available in 256-ball BGA_ED and 208-lead LQFP_EP packages SIMD Core Instruction Cache 5 stage Sequencer DAG1/2 Timer PEx PEy FLAGx/IRQx/ TMREXP JTAG Block 0 RAM/ROM Internal Memory Block 1 RAM/ROM Block 2 RAM Block 3 RAM DMD 64-BIT DMD 64-BIT PMD 64-BIT Core Bus Cross Bar PERIPHERAL BUS 32-BIT PMD 64-BIT EPD BUS 32-BIT B0D 64-BIT B1D 64-BIT B2D 64-BIT Internal Memory I/F IOD0 32-BIT B3D 64-BIT IOD1 32-BIT PERIPHERAL BUS IOD0 BUS CORE PCG FLAGS C-D TIMER 2-0 SPI/B UART 1-0 S/PDIF PCG Tx/Rx A-D ASRC IDP/ SPORT 3-0 PDAP 7-0...