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ADSP-21564 - SHARC+ Single Core High Performance DSP

Download the ADSP-21564 datasheet PDF. This datasheet also covers the ADSP-21560 variant, as both devices belong to the same sharc+ single core high performance dsp family and are provided as variant models within a single manufacturer datasheet.

General Description

3 SHARC Processor 4 SHARC+ Core Architecture 6 System Infrastructure 8 System Memory Map 8 Security

Key Features

  • Enhanced SHARC+ high performance floating-point core Up to 933 MHz 5 Mb (640 kB) Level 1 (L1) SRAM memory with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed point Byte, short word, word, long word addressed Powerful DMA system On-chip memory protection Integrated safety features 17 mm × 17 mm, 400-ball CSP_BGA (0.8 mm pitch), RoHS compliant 120-lead LQFP_EP (0.4 mm pitch), RoHS compliant Low system power across automotive temperatu.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (ADSP-21560-AnalogDevices.pdf) that lists specifications for multiple related part numbers.

Other Datasheets by Analog Devices

Part Number Description
ADSP-21560 SHARC+ Single Core High Performance DSP
ADSP-21561 SHARC+ Single Core High Performance DSP
ADSP-21566 High Performance DSP
ADSP-21567 High Performance DSP
ADSP-21568 SHARC+ Single Core High Performance DSP
ADSP-21569 High Performance DSP
ADSP-21571 SHARC+ Dual-Core DSP
ADSP-21573 SHARC+ Dual-Core DSP
ADSP-21583 SHARC+ Dual-Core DSP
ADSP-21584 SHARC+ Dual-Core DSP

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
SHARC+ Single Core High Performance DSP (Up to 933 MHz) Preliminary Technical Data SYSTEM FEATURES Enhanced SHARC+ high performance floating-point core Up to 933 MHz 5 Mb (640 kB) Level 1 (L1) SRAM memory with parity (optional ability to configure as cache) 32-bit, 40-bit, and 64-bit floating-point support 32-bit fixed point Byte, short word, word, long word addressed Powerful DMA system On-chip memory protection Integrated safety features 17 mm × 17 mm, 400-ball CSP_BGA (0.8 mm pitch), RoHS compliant 120-lead LQFP_EP (0.4 mm pitch), RoHS compliant Low system power across automotive temperature range 3.