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ADSP2101BP100 - ADSP-2100 Family DSP Microcomputers

This page provides the datasheet information for the ADSP2101BP100, a member of the ADSP-2101BP-100 ADSP-2100 Family DSP Microcomputers family.

Datasheet Summary

Description

The ADSP-2100 Family processors are single-chip microcomputers optimized for digital signal processing (DSP) and other high speed numeric processing applications.

The ADSP-21xx processors are all built upon a common core.

computation units, d

Features

  • 25 MIPS, 40 ns Maximum Instruction Rate Separate On-Chip Buses for Program and Data Memory Program Memory Stores Both Instructions and Data (Three-Bus Performance) Dual Data Address Generators with Modulo and Bit-Reverse Addressing Efficient Program Sequencing with Zero-Overhead Looping: Single-Cycle Loop Setup Automatic Booting of On-Chip Program Memory from Byte-Wide External Memory (e. g. , EPROM ) Double-Buffered Serial Ports with Companding Hardware, Automatic Data Buffering, and Multichannel.

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Datasheet preview – ADSP2101BP100

Datasheet Details

Part number ADSP2101BP100
Manufacturer Analog Devices
File Size Direct Link
Description ADSP-2100 Family DSP Microcomputers
Datasheet download datasheet ADSP2101BP100 Datasheet
Additional preview pages of the ADSP2101BP100 datasheet.

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Full PDF Text Transcription

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a ADSP-2100 Family DSP Microcomputers ADSP-21xx SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/ Accumulator, and Shifter Single-Cycle Instruction Execution & Multifunction Instructions On-Chip Program Memory RAM or ROM & Data Memory RAM Integrated I/O Peripherals: Serial Ports, Timer, Host Interface Port (ADSP-2111 Only) FEATURES 25 MIPS, 40 ns Maximum Instruction Rate Separate On-Chip Buses for Program and Data Memory Program Memory Stores Both Instructions and Data (Three-Bus Performance) Dual Data Address Generators with Modulo and Bit-Reverse Addressing Efficient Program Sequencing with Zero-Overhead Looping: Single-Cycle Loop
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