HMC7044 - 14-Output Jitter Attenuator

Analog Devices

General Description

Ultralow rms jitter: 44 fs typical (12 kHz to 20 MHz) at 2457.6 MHz Noise floor: 156 dBc/Hz at 2457.6 MHz Low phase noise: 141.7 dBc/Hz at 800 kHz, 983.04 MHz output Up to 14 LVDS, LVPECL, or CML type device clocks (DCLKs) from PLL2 Maximum CLKOUTx/CL

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HMC7044 14-output jitter attenuator by Analog Devices - Datasheet Preview

Datasheet Details

Part number	HMC7044
Manufacturer	Analog Devices
File Size	4.18 MB
Description	14-Output Jitter Attenuator
Datasheet	HMC7044 Datasheet

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Full PDF Text Transcription (Reference)

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Data Sheet HMC7044 High Performance, 3.2 GHz, 14-Output Jitter Attenuator with JESD204B and JESD204C Support FEATURES GENERAL DESCRIPTION ► Ultralow rms jitter: 44 fs typical (12 kHz to 20 MHz) at 2457.6 MHz ► Noise floor: −156 dBc/Hz at 2457.6 MHz ► Low phase noise: −141.7 dBc/Hz at 800 kHz, 983.