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HMC794LP3E - LOW NOISE PROGRAMMABLE DIVIDER

Description

The HMC794LP3E is a SiGe BiCMOS low noise programmable frequency divider in a 3x3mm leadless surface mount package.

The circuit can be programmed to divide from N = 1 to N = 4 in the 200 MHz to 2 GHz input frequency range.

Features

  • Low Noise Floor: -163 dBc/Hz at 10 MHz offset and -160 dBc/Hz at 100 kHz offset Programmable Frequency Divider, N = 1, 2, 3 or 4 200 MHz to 2 GHz Input Frequency Range 50% Duty Cycle Outputs Up to +10 dBm Output Power Sleep Mode: Consumes.

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Datasheet Details

Part number HMC794LP3E
Manufacturer Analog Devices
File Size 769.14 KB
Description LOW NOISE PROGRAMMABLE DIVIDER
Datasheet download datasheet HMC794LP3E Datasheet
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Full PDF Text Transcription

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Frequency Dividers & Detectors - SMT v01.0612 Typical Applications The HMC794LP3E is ideal for: • LO Generation with Low Noise Floor • Clock Generators • Mixer LO Drive • Military Applications • Test Equipment • Sensors Functional Diagram HMC794LP3E 2 GHz LOW NOISE PROGRAMMABLE DIVIDER (N = 1 to 4) Features Low Noise Floor: -163 dBc/Hz at 10 MHz offset and -160 dBc/Hz at 100 kHz offset Programmable Frequency Divider, N = 1, 2, 3 or 4 200 MHz to 2 GHz Input Frequency Range 50% Duty Cycle Outputs Up to +10 dBm Output Power Sleep Mode: Consumes <1 µA 16 Lead 3X3 mm SMT Package: 9mm2 General Description The HMC794LP3E is a SiGe BiCMOS low noise programmable frequency divider in a 3x3mm leadless surface mount package.
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