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APL5333 - 3A Bus Termination Regulator

General Description

The APL5333 linear regulator is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination.

The APL5333 integrates two power transistors to source or sink current up to 3A.

It also incorporate current-limit, thermal shutdown into a single chip.

Key Features

  • Sourcing and Sinking Current up to 3A Wide Input Voltage Range: 1.2V to 3.6V VTT and VTTREF Voltage Tracks at Half the VREF Voltage VTT and VTTREF Voltage with ±20mV Accuracy Excellent Load Transient Response - Droop Compensation - Fast Loop Response General.

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Datasheet Details

Part number APL5333
Manufacturer Anpec Electronics
File Size 461.17 KB
Description 3A Bus Termination Regulator
Datasheet download datasheet APL5333 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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APL5333 3A Bus Termination Regulator Features • • • • • Sourcing and Sinking Current up to 3A Wide Input Voltage Range: 1.2V to 3.6V VTT and VTTREF Voltage Tracks at Half the VREF Voltage VTT and VTTREF Voltage with ±20mV Accuracy Excellent Load Transient Response - Droop Compensation - Fast Loop Response General Description The APL5333 linear regulator is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination. The APL5333 integrates two power transistors to source or sink current up to 3A. It also incorporate current-limit, thermal shutdown into a single chip. The output voltage of APL5333 tracks the voltage at VREF pin. An internal resistor divider is used to provide a half voltage of VREF for VTTREF and VTT Voltage.