Arizona Microtek AZ12010
The AZ12010 contains all of the functional elements necessary to implement a Phase-Locked Loop for clock multiplication at frequencies up to 800 MHz. The output can be divided by two for 16 times net multiplication. The VCSO is differentially or single-ended driven using the chip CML SAW outputs.| Part No. | AZ12010 |
|---|---|
| Datasheet | AZ12010 Download |
| Manufacturer | Arizona Microtek |
| Description | Phase-Locked Loop Clock Generator |
| Buy | Stock & Price |
FEATURES
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● Differential Inputs/Outputs for External Voltage Controlled SAW Oscillator Optional Internal Crystal Oscillator Driver Internal Edge-Matching Phase/Frequency Detector Internal Charge-Pump/Integrator Amplifier RF Bipolar Design for Low Phase Noise Available in a 3x3 mm MLP Package PACKAGE MLP 16 (3x3) MLP 16 (3x3) RoHS Compliant / Lead (Pb) Free MLP 16 (3x3) MLP 16 (3x3) RoHS Compliant / Lead (Pb) Free DIE 1 2 3 PACKAGE AVAILABILITY PART NO. AZ12010AL AZ12010AL+ AZ12010BL AZ12010BL+ AZ12010XP MARKING AZ12010A <Date Code> AZ12010A+ <Date Code> AZ12010B <Date Code> AZ12010B+ <Date Code> N/A NOTES 1,2 1,2 1,2 1,2 3
DESCRIPTION
Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts) Tape & Reel. Date code format: “YY” for year followed by “WW” for week. Waffle Pack A fixed 32 times multiplication allows the use of low cost crystals or a low frequency reference signal. The dynamic properties of the PLL are under the control of the user through selection of the desired external components.
