Datasheet4U Logo Datasheet4U.com

AZP94 - Clock Generation Chip

Description

The AZP94 is a specialized ÷1 or ÷2 clock generation part including an enable/reset function.

The divide ratio is selected with the DIV-SEL pin/pad.

When DIV-SEL is open (NC), the AZP94 functions as a standard receiver.

Features

  • Green and RoHS Compliant / Lead (Pb) Free Package Available 3.0V to 5.5V Operation Selectable Divide Ratio Selectable Enable Polarity and Threshold (CMOS/TTL or PECL) Tristate Compatible Outputs Input Buffer Powers Down when Disabled Selectable Input Biasing High Bandwidth for ≥1GHz Available in a MLP 8 (2x2) Package IBIS Model File Available on Arizona Microtek Website.

📥 Download Datasheet

Datasheet preview – AZP94

Datasheet Details

Part number AZP94
Manufacturer Arizona Microtek
File Size 167.13 KB
Description Clock Generation Chip
Datasheet download datasheet AZP94 Datasheet
Additional preview pages of the AZP94 datasheet.

📁 Similar Datasheet

Other Datasheets by Arizona Microtek
  • AZP92 - Clock Generation Chip
  • AZP96 - ECL/PECL Differential Receiver

Full PDF Text Transcription

Click to expand full text
www.DataSheet4U.com ARIZONA MICROTEK, INC. AZP94 ECL/PECL ÷1, ÷2 Clock Generation Chip with Tristate Compatible Outputs FEATURES • • • • • • • • • • Green and RoHS Compliant / Lead (Pb) Free Package Available 3.0V to 5.5V Operation Selectable Divide Ratio Selectable Enable Polarity and Threshold (CMOS/TTL or PECL) Tristate Compatible Outputs Input Buffer Powers Down when Disabled Selectable Input Biasing High Bandwidth for ≥1GHz Available in a MLP 8 (2x2) Package IBIS Model File Available on Arizona Microtek Website PACKAGE MLP 8 (2x2) Green / RoHS Compliant / Lead (Pb) Free DIE 1 2 3 4 PACKAGE AVAILABILITY PART NO. AZP94NAG AZP94XP MARKING J4G N/A NOTES 1,2 3,4 Add R1 at end of part number for 7 inch (1K parts), R2 for 13 inch (2.5K parts) Tape & Reel.
Published: |