PDC2 Overview
The Peripheral Data Controller 2 (PDC2) transfers data between on-chip peripherals such as the UART, USART, SSC and SPI and the on- and off-chip memories. This transfer is achieved via the AMBA Bridge using a simple arbitration mechanism between the AMBA System Bus (ASB) and the PDC2 to control Bridge access. This avoids processor intervention and removes the processor interrupt handling overhead.
PDC2 Key Features
- patible with an Embedded ARM7TDMI™ Processor Generates Transfers to/from Serial Peripherals Such as UART, USART, SSC and
- Parameterizable on Request One ARM® Cycle Needed for a Transfer from Memory to Peripheral Two ARM Cycles Needed for a Tr
- 1):0] bwait[(asb_n(1)
