BS62LV2001 Datasheet | Brilliance Semiconductor

- Features Very Low Power/Voltage CMOS SRAM 256K X 8 bit - DESCRIPTION - Wide Vcc operation voltage : 2.4V ~ 5.5V - Very low power consumption : Vcc = 3.0V C-grade : 20m A (Max.) operating current I- grade : 25m A (Max.) operating current 0.1u A (Typ.) CMOS standby current Vcc = 5.0V C-grade : 35m A (Max.) operating current I- grade : 40m A (Max.) operating current 0.6u A (Typ.) CMOS standby current - High speed access time : -70 70ns(Max.) at Vcc = 3.0V -10 100ns(Max.) at Vcc = 3.0V - Automatic power down when chip is deselected - Three state outputs and TTL patible - Fully static operation - Data retention supply voltage as low as 1.5V - Easy expansion with CE2, CE1, and OE options - All I/O pins are 3V/5V tolerant The BS62LV2001 is a high performance, very low power CMOS Static Random Access Memory organized as 262,144 words by 8 bits and operates in a wide range of 2.4V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power Features with a typical CMOS standby current of 0.1u A and maximum access time of 70ns in 3V operation. Easy memory expansion is provided by an active LOW chip enable (CE1), an active HIGH chip enable (CE2), and active LOW output enable (OE) and three-state output drivers. The BS62LV2001 has an automatic power down feature, reducing the power consumption significantly when chip is deselected. The BS62LV2001 is available in DICE form, JEDEC standard 32 pin 450mil Plastic SOP, 8mmx13.4mm STSOP, and 8mmx20mm TSOP. - PRODUCT FAMILY - PIN CONFIGURATIONS A11 A9 A8 A13 WE CE2 A15 VCC A17 A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 - BLOCK DIAGRAM OE A10 CE1 DQ7 DQ6 DQ5 DQ4 DQ3 GND DQ2 DQ1 DQ0 A0 A1 A2 A3 A13 A17 A15 A16 A14 A12 A7 A6 A5 A4 A17 A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 GND Brilliance Semiconductor Inc. reserves the right to modify document contents without notice. R0201-BS62LV2001 -...