Datasheet Summary
SBAS313A
- JUNE 2004
- REVISED JUNE 2004
8-Channel, 12-Bit, 50MSPS ADC with Serial LVDS Interface
Features
D Maximum Sample Rate: 50MSPS D 12-Bit Resolution D No Missing Codes .. D Power Dissipation: 957mW D CMOS Technology D Simultaneous Sample-and-Hold D 70.5dB SNR at 10MHz IF D Internal and External References D 3.3V Digital/Analog Supply D Serialized LVDS Outputs D Integrated Frame and Synch Patterns D MSB and LSB First Modes D Option to Double LVDS Clock Output Currents D Pin- and Format-patible Family D TQFP-80 PowerPAD Package or LSB first. The bit coinciding with the rising edge of the 1x clock output is the first bit of the word. Data is to be...