PLL1705 Datasheet | Burr-Brown

FEATURES D 27-MHz Master Clock Input D Generated Audio System Clock: .. - SCKO0: 768 f S (f S = 44.1 k Hz) - SCKO1: 384 f S, 768 f S (f S = 44.1 k Hz) - SCKO2: 256 f S (f S = 32, 44.1, 48, 64, 88.2, 96 k Hz) - SCKO3: 384 f S (f S = 32, 44.1, 48, 64, 88.2, 96 k Hz) APPLICATIONS D DVD Players D DVD Add-On Cards for Multimedia PCs D Digital HDTV Systems D Set-Top Boxes DESCRIPTION The PLL1705† and PLL1706† are low cost, phase-locked loop (PLL) multiclock generators. The PLL1705 and PLL1706 can generate four system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1705 can be controlled by sampling frequency-control pins and those of the PLL1706 can be controlled through serial-mode control pins. The device gives customers both cost and space savings by eliminating external ponents and enables customers to achieve the very low-jitter performance needed for high performance audio DACs and/or ADCs. The PLL1705 and PLL1706 are ideal for MPEG-2 applications which use a 27-MHz master clock such as DVD players, DVD add-on cards for multimedia PCs, digital HDTV systems, and set-top boxes. D Zero PPM Error Output Clocks D Low Clock Jitter: 50 ps (Typical) D Multiple Sampling Frequencies: - f S = 32, 44.1, 48, 64, 88.2, 96 k Hz D 3.3-V Single Power Supply D PLL1705: Parallel Control PLL1706: Serial Control D Package: 20-Pin SSOP (150 mil), Lead-Free Product FUNCTIONAL BLOCK DIAGRAM (ML) SR (MC) FS2 (MD) FS1 CSEL VCC AGND VDD1- 3 DGND1- 3 Mode Control Interface Reset PLL2 XT1 OSC XT2 PLL1 Power Supply Divider Divider Divider ( ): PLL1706 MCKO1 MCKO2 SCKO0 SCKO1 SCKO2 SCKO3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. †The PLL1705 and PLL1706 use the same die and they are electrically identical except for mode control. PRODUCTION DATA information is current as of publication...