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CEB6031LS2 - N-Channel Logic Level Enhancement Mode Field Effect Transistor

Download the CEB6031LS2 datasheet PDF. This datasheet also covers the CEB6031LS2_Chino variant, as both devices belong to the same n-channel logic level enhancement mode field effect transistor family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • 30V , 60A , RDS(ON)=12m Ω @VGS=10V. RDS(ON)=17mΩ @VGS=4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-220 & TO-263 package. D G G D G S CEB SERIES TO-263(DD-PAK) G D S CEP SERIES TO-220 S.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CEB6031LS2_Chino-ExcelTechnology.pdf) that lists specifications for multiple related part numbers.

Datasheet Details

Part number CEB6031LS2
Manufacturer Chino-Excel Technology
File Size 52.33 KB
Description N-Channel Logic Level Enhancement Mode Field Effect Transistor
Datasheet download datasheet CEB6031LS2 Datasheet

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Other Datasheets by Chino-Excel Technology

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CEP6031LS2/CEB6031LS2 March 1998 N-Channel Logic Level Enhancement Mode Field Effect Transistor FEATURES 30V , 60A , RDS(ON)=12m Ω @VGS=10V. RDS(ON)=17mΩ @VGS=4.5V. Super high dense cell design for extremely low RDS(ON). High power and current handling capability. TO-220 & TO-263 package. D G G D G S CEB SERIES TO-263(DD-PAK) G D S CEP SERIES TO-220 S ABSOLUTE MAXIMUM RATINGS (TC=25 C unless otherwise noted) Parameter Symbol Drain-Source Voltage VDS Gate-Source Voltage VGS Drain Current-Continuous @TJ=125 C -Pulsed ID IDM Drain-Source Diode Forward Current IS Maximum Power Dissipation @Tc=25 C Derate above 25 C PD 15 Operating and StorageTemperature Range TJ, TSTG Limit 30 Ć 20 60 180 60 50 0.