MPS6501 Datasheet | Commodore

, . .modore ~ aarnlcondu Cl:ar group ~UYAJ@~ 6500/1 ONE-CHIP MICROPUTER 8500/1 ONE-CHIP MICROPUTER INTRODucno N The MOS Technology 6500/1 Is a plete, high-performance 8-blt NMOS microputer on a single chip, and Is totally upward/downward software patible with all members of the 6500 family. The 650011 consists of a 6502 CPU, an Internal clock oscillator, 2048 bytes of Read Only Memory (ROM), 64 bytes of Random Access Memory (RAM) and flexible Interface circuitry. The- interface circuitry includes a 18-blt programmable counter/latch with four operating modes, 32 bidirectional Input/output lines (Including two edgesensitive lines), five Interrupts and a counter I/O line. PRODUCT SUPPORT To allow prototype clr Cl~lt development, Mos Tech- nology offers a PROM patible 64-pln Emulator device. This device provides all 650011 Interface lines plus routing the address bus, data bus, and associated control lines off the chip to be connected to external memory. Order...