STC4130 Datasheet | Connor-Winfield

Synchronous Clock for SETS Data Sheet Description The STC4130 is a ROHS patible, integrated, single chip solution for the synchronous clock in SDH and SONET network elements. The device is fully pliant with ITU-T G.812 Type III, G.813, and Telcordia GR1244, and GR253. The STC4130 accepts 12 reference inputs and generates 8 independent synchronized output clocks. Reference input frequencies are automatically detected, and inputs are individually monitored for quality. Active reference selection may be manual or automatic. All reference switches are hitless. Synchronized outputs may be programmed for a wide variety of SONET and SDH frequencies. Two independent clock generators provide the standardized T0 and T4 functions. Each clock generator includes a DPLL (Digital Phase-Locked Loop), which may operate in the Freerun, Synchronized, and Holdover modes. Both clock generators support master/ slave operation for redundant applications. Connor Winfield’s proprietary Sync Link TM Cross-couple data link provides master/slave phase information and state data to ensure seamless side switches. A standard SPI serial bus interface or parallel bus provide access to the STC4130’s prehensive, yet simple to use internal control and status registers. The device operates with an external OCXO or TCXO as its MCLK at either 10 or 20 MHz. Features - - - - - - - - - - - - - - - - - Functional Specification For SDH SETS and SSU For SONET Stratum 3E, 3, 4E, 4 and SMC plies with ITU-T G.812 Type III , G.813, Telcordia GR1244, and GR253 Supports Master/Slave operation with the Sync Link TM cross-couple data link for master/ slave redundant applications Accepts 12 individual clock reference inputs Reference clock inputs are automatically frequency detected Supports manual or automatic reference selection T0 and T4 have independent reference lists and priority tables for automatic reference selection 8 synchronized output clocks Output/input phase skew is adjustable in...