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CY14B512J - 512-Kbit (64 K x 8) Serial (I2C) nvSRAM

General Description

Clock.

Runs at speeds up to a maximum of fSCL.

I/O.

Key Features

  • 512-Kbit nonvolatile static random access memory (nvSRAM).
  • Internally organized as 64 K × 8.
  • STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using I2C command (Software STORE) or HSB pin (Hardware STORE).
  • RECALL to SRAM initiated on power-up (Power-Up RECALL) or by I2C command (Software RECALL).
  • Automatic STORE on power-down with a small capacitor (except for CY14X512J1).
  • High reliability Infinite read, writ.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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512-Kbit (64 K × 8) Serial (I C) nvSRAM 512-Kbit (64 K × 8) Serial (I2C) nvSRAM CY14C512J CY14B512J, CY14E512J 2 Features ■ ■ 512-Kbit nonvolatile static random access memory (nvSRAM) ❐ Internally organized as 64 K × 8 ❐ STORE to QuantumTrap nonvolatile elements initiated automatically on power-down (AutoStore) or by using I2C command (Software STORE) or HSB pin (Hardware STORE) ❐ RECALL to SRAM initiated on power-up (Power-Up RECALL) or by I2C command (Software RECALL) ❐ Automatic STORE on power-down with a small capacitor (except for CY14X512J1) ■ High reliability Infinite read, write, and RECALL cycles 1 million STORE cycles to QuantumTrap ❐ Data retention: 20 years at 85 C 2 ■ High speed I C interface ❐ Industry standard 100 kHz and 400 kHz speed ❐ Fast-mode Plus: 1 MHz speed ❐ Hi