CY2CP1504 Description
The CY2CP1504 is an ultra-low noise, low-skew, low-propagation delay 1:4 LVCMOS to LVPECL fanout buffer targeted to meet the requirements of high-speed clock distribution applications. The CY2CP1504 can select between two separate LVCMOS input clocks using the IN_.
CY2CP1504 Key Features
- Select one of two low-voltage plementary metal oxide semiconductor (LVCMOS) inputs to distribute to four low-voltage pos
- 30-ps maximum output-to-output skew
- 480-ps maximum propagation delay
- 0.15-ps maximum additive RMS phase jitter at 156.25 MHz
- Up to 250 MHz operation
- Synchronous clock enable function
- 20-Pin thin shrunk small outline package (TSSOP) package
- 2.5-V or 3.3-V operating voltage [1]
- mercial and industrial operating temperature range