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CY3120 Datasheet Cpld Development Software For Pc

Manufacturer: Cypress (now Infineon)

Overview: 0.

General Description

s: — Behavioral VHDL and Verilog (IF...THEN...ELSE;

CASE...) — Boolean — Aldec Active-HDL™ FSM graphical Finite State Machine editor — Structural Verilog and VHDL — Designs can include multiple entry methods (but only one HDL language) in a single design.

• UltraGen™ Synthesis and Fitting Technology: — Infers “modules” such as adders, parators, etc., from behavioral descriptions and replaces them with circuits pre-optimized for the target device.

Key Features

  • VHDL (IEEE 1076 and 1164) and Verilog (IEEE 1364) high-level language compilers with the following features:.
  • Designs are portable across multiple devices and/or EDA environments w w.
  • Facilitates the use of industry-standard simulation and synthesis tools for board and system-level design w . D a S a t e e h U 4 t . m o c CY3120 Warp® CPLD Development Software for PC.
  • User selectable speed and/or area optimization on a block-by-block basis.

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CY3120 Distributor