CY7C09169 Key Features
- True Dual-Ported memory cells which allow simultaneous access of the same memory location
- 2 Flow-Through/Pipelined devices
- 8K x 9 organization (CY7C09159)
- 16K x 9 organization (CY7C09169)
- 3 Modes
- Flow-Through
- Pipelined
- Pipelined output mode on both ports allows fast 100-MHz cycle time
- 0.35-micron CMOS for optimum speed/power
- High-speed clock to data access 6.5/7.5/12 ns (max.)