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CY7C1019D - 1-Mbit (128 K x 8) Static RAM

General Description

The CY7C1019D [1] is a high-performance CMOS static RAM organized as 131,072 words by 8 bits.

Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers.

Key Features

  • Pin- and function-compatible with CY7C1019B.
  • High speed.
  • tAA = 10 ns.
  • Low active power.
  • ICC = 80 mA @ 10 ns.
  • Low CMOS standby power.
  • ISB2 = 3 mA.
  • 2.0 V Data retention.
  • Automatic power-down when deselected.
  • CMOS for optimum speed/power.
  • Center power/ground pinout.
  • Easy memory expansion with CE and OE options.
  • Functionally equivalent to CY7C1019B.
  • Available in Pb-free 32-pin 400-Mil wide Molded SOJ and 32-pin TSOP II packages L.

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Part Number Description
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY7C1019D 1-Mbit (128 K × 8) Static RAM 1-Mbit (128 K × 8) Static RAM Features ■ Pin- and function-compatible with CY7C1019B ■ High speed ❐ tAA = 10 ns ■ Low active power ❐ ICC = 80 mA @ 10 ns ■ Low CMOS standby power ❐ ISB2 = 3 mA ■ 2.0 V Data retention ■ Automatic power-down when deselected ■ CMOS for optimum speed/power ■ Center power/ground pinout ■ Easy memory expansion with CE and OE options ■ Functionally equivalent to CY7C1019B ■ Available in Pb-free 32-pin 400-Mil wide Molded SOJ and 32-pin TSOP II packages Logic Block Diagram Functional Description The CY7C1019D [1] is a high-performance CMOS static RAM organized as 131,072 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers.