Datasheet Details
| Part number | CY7C1355A |
|---|---|
| Manufacturer | Cypress Semiconductor |
| File Size | 776.64 KB |
| Description | (CY7C1355A / CY7C1357A) 256K x 36/512K x 18 Synchronous Flow-Thru SRAM |
| Datasheet |
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| Part number | CY7C1355A |
|---|---|
| Manufacturer | Cypress Semiconductor |
| File Size | 776.64 KB |
| Description | (CY7C1355A / CY7C1357A) 256K x 36/512K x 18 Synchronous Flow-Thru SRAM |
| Datasheet |
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The CY7C1355A and CY7C1357A SRAMs are designed to eliminate dead cycles when transitions from READ to WRITE or vice versa.
These SRAMs are optimized for 100 percent bus utilization and achieves Zero Bus Latency (ZBL).