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CY7C1381KV33 - 18-Mbit Flow-Through SRAM

Key Features

  • Supports 133 MHz bus operations.
  • 512K × 36 and 1M × 18 common I/O.
  • 3.3 V core power supply (VDD).
  • 2.5 V or 3.3 V I/O supply (VDDQ).
  • Fast clock-to-output time.
  • 6.5 ns (133 MHz version).
  • Provides high performance 2-1-1-1 access rate.
  • User selectable burst counter supporting interleaved or linear burst sequences.
  • Separate processor and controller address strobes.
  • Synchronous self-timed write.
  • Asynchronous output enable.
  • CY7C1381KV.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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CY7C1381KV33/CY7C1381KVE33 CY7C1383KV33/CY7C1383KVE33 18-Mbit (512K × 36/1M × 18) Flow-Through SRAM (With ECC) 18-Mbit (512K × 36/1M × 18) Flow-Through SRAM (With ECC) Features ■ Supports 133 MHz bus operations ■ 512K × 36 and 1M × 18 common I/O ■ 3.3 V core power supply (VDD) ■ 2.5 V or 3.3 V I/O supply (VDDQ) ■ Fast clock-to-output time ❐ 6.5 ns (133 MHz version) ■ Provides high performance 2-1-1-1 access rate ■ User selectable burst counter supporting interleaved or linear burst sequences ■ Separate processor and controller address strobes ■ Synchronous self-timed write ■ Asynchronous output enable ■ CY7C1381KV33/CY7C1381KVE33 available in JEDEC-standard Pb-free 100-pin TQFP, Pb-free 165-ball FBGA package.