Datasheet4U Logo Datasheet4U.com

CY7C1465AV33 - Flow-Through SRAM

Download the CY7C1465AV33 datasheet PDF. This datasheet also covers the CY7C1461AV33 variant, as both devices belong to the same flow-through sram family and are provided as variant models within a single manufacturer datasheet.

Description

The CY7C1461AV33/CY7C1463AV33/CY7C1465AV33[1] are 3.3V, 1M x 36/2M x 18/512K x 72 Synchronous Flow-Through Burst SRAMs designed specifically to support unlimited true back-to-back read and write operations without the insertion of wait states.

Features

  • Functional.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CY7C1461AV33_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
CY7C1460SV25 36-Mbit (1M x 36/2M x 18) Pipelined SRAM Cypress
CY7C1462SV25 36-Mbit (1M x 36/2M x 18) Pipelined SRAM Cypress
CY7C1006D 1-Mbit (256K x 4) Static RAM Cypress
CY7C1011G 2-Mbit (128K words x 16 bit) Static RAM Cypress
CY7C1041G 4-Mbit (256K words x 16 bit) Static RAM Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CY7C1465AV25 Flow-Through SRAM
CY7C146 2K x 8 Dual-Port Static RAM
CY7C1460AV25 36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM
CY7C1460AV33 36-Mbit Pipelined SRAM
CY7C1460BV25 36-Mbit (1 M x 36/2 M x 18) Pipelined SRAM

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
CY7C1461AV33 www.DataSheet4U.com CY7C1463AV33, CY7C1465AV33 36 Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL™ Architecture Features ■ ■ Functional Description The CY7C1461AV33/CY7C1463AV33/CY7C1465AV33[1] are 3.3V, 1M x 36/2M x 18/512K x 72 Synchronous Flow-Through Burst SRAMs designed specifically to support unlimited true back-to-back read and write operations without the insertion of wait states. The CY7C1461AV33/CY7C1463AV33/CY7C1465AV33 is equipped with the advanced NoBL logic required to enable consecutive read and write operations with data being transferred on every clock cycle. This feature dramatically improves the throughput of data through the SRAM, especially in systems that require frequent write-read transitions.
Published: |