CY7C1481V33 Description
The Cypress Synchronous Burst SRAM family employs high-speed, low power CMOS designs using advanced single-layer polysilicon, triple-layer metal technology. Each memory cell consists of six transistors. A 3901 North First Street.
CY7C1481V33 Key Features
- Supports 133-MHz bus operations
- 2M x 36/4M x 18/1M x 72 mon I/O
- Fast clock-to-output times
- 5.5 ns (for 150-MHz device)
- 6.5 ns (for 133-MHz device)
- 7.5 ns (for 117-MHz device)
- 8.5 ns (for 100-MHz device)
- Single 3.3V -5% and +5% power supply VDD
- Separate VDDQ for 3.3V or 2.5V
- Byte Write Enable and Global Write control