CY7C335 - Universal Synchronous EPLD

Datasheet Summary

Description

The CY7C335 is a high-performance, erasable, programmable logic device (EPLD) whose architecture has been optimized to enable the user to easily and efficiently construct very high performance state machines.

Features

100-MHz output registered operation.
Twelve I/O macrocells, each having:.
Registered, three-state I/O pins.
Input and output register clock select multiplexer.
Feed back multiplexer.
Output enable (OE) multiplexer Bypass on input and output registers All twelve macrocell state registers can be hidden User configurable I/O macrocells to impleme.

Cypress Semiconductor

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Datasheet Details

Part number	CY7C335
Manufacturer	Cypress Semiconductor
File Size	342.27 KB
Description	Universal Synchronous EPLD
Datasheet	CY7C335 Datasheet
Additional preview pages of the CY7C335 datasheet.

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1CY 7C33 5 fax id: 6018 CY7C335 www.DataSheet4U.

Published: Jan 22, 2009 |