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CY7C4255 - 8K/16Kx18 Deep Sync FIFOs

General Description

The CY7C4255/65 are high-speed, low-power, first-in first-out (FIFO) memories with clocked read and write interfaces.

17 INPUT REGISTER WCLK WEN WRITE CONTROL FLAG PROGRAM REGISTER RAM ARRAY 8K x 18 16K x 18 WRITE POINTER FLAG LOGIC FF EF PAE PAF SMODE

Key Features

  • High-speed, low-power, first-in first-out (FIFO) memories.
  • 8K x 18 (CY7C4255).
  • 16K x 18 (CY7C4265).
  • 0.5 micron CMOS for optimum speed/power.
  • High-speed 100-MHz operation (10 ns read/write cycle times).
  • Low power.
  • ICC=45 mA.
  • Fully asynchronous and simultaneous read and write operation.
  • Empty, Full, Half Full, and programmable Almost Empty and Almost Full status flags.
  • TTL compatible.
  • Retransmit fun.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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1CY 7C42 65 fax id: 5413 PRELIMINARY CY7C4255 CY7C4265 8K/16Kx18 Deep Sync FIFOs Features • High-speed, low-power, first-in first-out (FIFO) memories • 8K x 18 (CY7C4255) • 16K x 18 (CY7C4265) • 0.