CY7C4255V Datasheet | Cypress

CY7C4255V CY7C4275V CY7C4285V 8K/32K/64K × 18 Low Voltage Deep Sync FIFOs 8K/32K/64K × 18 Low Voltage Deep Sync FIFOs Features - 3.3 V operation for low power consumption and easy integration into low voltage systems - High speed, low power, first-in first-out (FIFO) memories - 8K × 18 (CY7C4255V) - 32K × 18 (CY7C4275V) - 64K × 18 (CY7C4285V) - 0.35 micron CMOS for optimum speed and power - High speed 100 MHz operation (10 ns read/write cycle times) - Low power - ICC = 30 m A - ISB = 4 m A - Fully asynchronous and simultaneous read and write operation - Empty, Full, Half Full, and programmable Almost Empty and Almost Full status flags - Retransmit function - Output Enable (OE) pin - Independent read and write enable pins - Supports free running 50% duty cycle clock inputs - Width Expansion Capability - Depth Expansion Capability - 64-pin 10 × 10 STQFP - Pin patible density upgrade to CY7C42X5V-ASC families - Pin patible 3.3 V...