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CYDMX064B16 - 16 K/8 K/4 K x 16 MoBL ADM 16 K/8 K/4 K x 16 MoBL ADM

Download the CYDMX064B16 datasheet PDF. This datasheet also covers the CYDMX064A16 variant, as both devices belong to the same 16 k/8 k/4 k x 16 mobl adm 16 k/8 k/4 k x 16 mobl adm family and are provided as variant models within a single manufacturer datasheet.

Description

4 Power Supply 4 ADM Interface Read or Write Operation 4 Standard SRAM Interface Read or Write Operation 5 Byte Select Operation 5 Chip Select Operation 5 Output Enable Operation 5 Mailbox Interrupts 5 Arbitration Logic 5 Input Read Register 5 Output Drive Register 5 Architecture 6 Maxim

Features

  • True dual-ported memory block that allow simultaneous independent access.
  • One port with dedicated time multiplexed address and data (ADM) interface.
  • One port configurable to standard SRAM or time multiplexed address and data interface 16 K/8 K/4 K × 16 memory configuration High speed access.
  • 65 ns or 90 ns ADM interface.
  • 40 ns or 60 ns standard SRAM interface Fully asynchronous operation Port independent 1.8 V, 2.5 V, and 3.0 V IOs Ultra low operating power.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (CYDMX064A16_CypressSemiconductor.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
CYDC128B16 ConsuMoBL Dual-Port Static RAM Cypress

Other Datasheets by Cypress (Infineon)

Part Number Description
CYDMX064A16 16 K/8 K/4 K x 16 MoBL ADM 16 K/8 K/4 K x 16 MoBL ADM
CYDMX128A16 16 K/8 K/4 K x 16 MoBL ADM 16 K/8 K/4 K x 16 MoBL ADM
CYDMX128B16 16 K/8 K/4 K x 16 MoBL ADM 16 K/8 K/4 K x 16 MoBL ADM
CYDMX256A16 16 K/8 K/4 K x 16 MoBL ADM 16 K/8 K/4 K x 16 MoBL ADM
CYDMX256B16 16 K/8 K/4 K x 16 MoBL ADM 16 K/8 K/4 K x 16 MoBL ADM

Full PDF Text Transcription

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16 K/8 K/4 K × 16 MoBL ADM Asynchronous Dual-Port Static RAM 16 K/8 K/4 K × 16 MoBL® ADM Asynchronous Dual-Port Static RAM CYDMX256A16, CYDMX256B16 CYDMX128A16, CYDMX128B16 CYDMX064A16, CYDMX064B16 ® Features ■ ■ True dual-ported memory block that allow simultaneous independent access ❐ One port with dedicated time multiplexed address and data (ADM) interface ❐ One port configurable to standard SRAM or time multiplexed address and data interface 16 K/8 K/4 K × 16 memory configuration High speed access ❐ 65 ns or 90 ns ADM interface ❐ 40 ns or 60 ns standard SRAM interface Fully asynchronous operation Port independent 1.8 V, 2.5 V, and 3.
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