CYF0036V datasheet PDF for 18/36/72 Mbit Programmable FIFOs Master reset to clear entire FIFO.
This datasheet includes multiple variants, all published together in a single manufacturer document.
| Part number | CYF0036V |
|---|---|
| Datasheet | CYF0036V CYF0018V Datasheet (PDF) |
| File Size | 606.22 KB |
| Manufacturer | Cypress (now Infineon) |
| Description | 18/36/72 Mbit Programmable FIFOs Master reset to clear entire FIFO |
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The Cypress programmable FIFO family offers the industry’s highest-density programmable FIFO memory device. It has independent read and write ports, which can be clocked up to 133 MHz. User can configure input and output bus sizes.
See all Cypress (now Infineon) datasheets
| Part Number | Description |
|---|---|
| CYF0018V | 18/36/72 Mbit Programmable FIFOs |
| CYF0072V | 18/36/72 Mbit Programmable FIFOs Master reset to clear entire FIFO |
| CYF1018V | 18/36/72-Mbit Programmable 2-Queue FIFOs |
| CYF1036V | 18/36/72-Mbit Programmable 2-Queue FIFOs |
| CYF1072V | 18/36/72-Mbit Programmable 2-Queue FIFOs |
| CYF2018V | 18/36/72-Mbit Programmable Multi-Queue FIFOs |
| CYF2036V | 18/36/72-Mbit Programmable Multi-Queue FIFOs |
| CYF2072V | 18/36/72-Mbit Programmable Multi-Queue FIFOs |
| CYFB0072V | 72-Mbit Video Frame Buffer |
