W181 Datasheet | Cypress

Features - Cypress PREMIS™ family offering - Generates an EMI optimized clocking signal at the output - Selectable input to output frequency - Single 1.25% or 3.75% down or center spread output - Integrated loop filter ponents - Operates with a 3.3V or 5V supply - Low power CMOS design - Available in 8-pin SOIC (Small Outline Integrated Circuit) or 14-pin TSSOP (Thin Shrink Small Outline Package select options only) Table 1. Modulation Width Selection SS% 0 1 W181-01, 02, 03 Output Fin ≥ Fout ≥ Fin - 1.25% Fin ≥ Fout ≥ Fin - 3.75% W181-51, 52, 53 Output Fin + 0.625% ≥ Fin≥ - 0.625% Fin + 1.875% ≥ Fin≥ - 1.875% Table 2. Frequency Range Selection W181 Option# FS2 0 0 1 1 FS1 0 1 0 1 -01, 51 (MHz) 28 ≤ FIN ≤ 38 38 ≤ FIN ≤ 48 46 ≤ FIN ≤ 60 58 ≤ FIN ≤ 75 -02, 52 (MHz) 28 ≤ FIN ≤ 38 38 ≤ FIN ≤ 48 N/A N/A -03, 53 (MHz) N/A N/A 46 ≤ FIN ≤ 60 58 ≤ FIN ≤ 75 Key Specifications Supply Voltages: VDD = 3.3V±5% or VDD = 5V±10% Frequency Range: 28 MHz ≤ Fin ≤ 75 MHz Crystal Reference Range 28 MHz ≤ Fin ≤ 40 MHz Cycle to Cycle Jitter: 300 ps (max.) Selectable Spread Percentage: 1.25% or 3.75% Output Duty Cycle: 40/60% (worst case) Output Rise and Fall Time: 5 ns (max.) Simplified Block Diagram 3.3 or 5.0V Pin Configurations SOIC W181-01/51 CLKIN or X1 NC or X2 GND SS% 1 2 3 4 8 7 6 5 FS2 FS1 VDD CLKOUT X1 XTAL Input X2 40 MHz Max. Spread Spectrum Output (EMI suppressed) CLKIN or X1 NC or X2 GND SS% 1 2 3 4 8 7 6 5 SSON# FS1 VDD CLKOUT W181-02/03 W181-52/53 3.3 or 5.0V TSSOP FS2 CLKIN or X1 NC or X2 GND NC SS% NC 1 2 3 4 5 6 7 14 13 12 11 10 9 8 W181-01 NC NC FS1 NC VDD NC CLKOUT Oscillator or Reference Input Spread Spectrum Output (EMI suppressed) PREMIS is a trademark of Cypress Semiconductor Corporation. Cypress Semiconductor...