W196 Overview
W196 CPU Clock Outputs 0 through 1: These two CPU clocks run at a frequency set by FS0:1 or the serial data interface. Output voltage swing is set by the voltage applied to VDDQ2.
W196 Key Features
- Maximized EMI suppression using Cypress’s Spread Spectrum Technology
- System frequency synthesizer for 440BX, 440ZX, and VIA Apollo Pro-133
- I2C programmable to 155 MHz (32 selectable frequencies)
- Two skew-controlled copies of CPU output
- Seven copies of PCI output (synchronous w/CPU output)
- One copy of 14.31818-MHz IOAPIC output
- One copy of 48-MHz USB output
- Selectable 24-/48-MHz clock is determined by resistor straps on power up
- One high-drive output buffer that produces a copy of the 14.318-MHz reference
- Isolated core VDD pin for noise reduction CPU Cycle to Cycle Jitter